Xiaomi Xuanjie O1 chip technology analysis: 3nm advanced process + ten cores and four clusters, a new breakthrough for domestic high-end SoC
Xiaomi officially releases its first3nm self-developed flagship chip Xuanjie O1, using TSMC's N3E process, fully benchmarking against top mobile platforms in terms of architecture, energy efficiency, and AI computing power, marking the entry of domestic advanced process SoC into the first echelon.
1. Advanced process: TSMC N3E 3nm, 19 billion transistors
- Craftsmanship:TSMC second generation 3nm (N3E)
- Transistor: approx.19 billion
- Chip area:109mm²
- Improvement: density + 12%, power consumption - 15%Achieve stronger performance in a smaller area, while significantly improving mobile phone battery life and heat control.
2. Innovative CPU architecture: 2+4+2+2 ten cores and four clusters
Breaking through the traditional 8-core design and adopting four-cluster heterogeneous scheduling:
- 2×Cortex-X925 super core @3.9GHz
- 4×Cortex-A725 performance core @3.4GHz
- 2×Cortex-A725 low-frequency energy efficiency core @1.9GHz
- 2×Cortex-A520 ultra-high energy efficiency core @1.8GHz
Performance:
- Geekbench 6 single core:2709 points
- Multi-core:8125 points
- Level: Beyond Snapdragon 8 Gen3, close to Dimensity 9400Taking into account instantaneous bursts, multi-threaded high load and long-term low-power standby.
3. Graphics and AI: flagship GPU + high computing power NPU
- GPU: 16-core Immortalis-G925, supports hardware ray tracing, scalable rendering, and maximizes gaming and rendering performance
- NPU: 6-core architecture, AI computing power44 TOPS
- Supports multi-algorithm parallelism, and cooperates with Xiaomi's end-side AI model to achieve faster inference and lower power consumption.
4. Complete heterogeneous computing framework
Xuanjie O1 realizes full-module collaboration:
- CPU: general computing and task scheduling
- GPU/ISP: graphics, image rendering processing
- NPU: AI reasoning and intelligent tasksThrough on-chip high-speed interconnection and unified scheduling, an overall experience of high performance, low latency, and high energy efficiency is achieved.
5. Industry significance
- Domestic chips for the first time3nm advanced processAchieve flagship-level large-scale mass production breakthrough
- Architectural design moves from following toIndependent innovation, four clusters and ten core architecture improve energy efficiency competitiveness
- Promote the maturity of the domestic high-end SoC industry chain and accelerate the independent and controllable process
- Provide a higher level of domestic computing base for mobile phones, AIoT, smart driving and other terminals